CMOS Structure:
P-well and N-well structure
Twin tub/well technology
In case of a p-well technology in early 1960s, doping concentration is higher that that of the n-substrate doping to get enhancement mode MOSFET.
n-well technology started after 1970s. Problem was to match the threshold voltage in two devices. This started twin tub/well technology.
CMOS Fabrication Steps:
1. Substrate: Start with p-type substrate.
2. Oxidation: Oxidation is a important step in IC fabrication process. SiO2 plays an important role in IC technology because no other semiconductor has a native oxide which is able to achieve all the properties of SiO2.Creating protective layer of SiO2 layer on the wafer surface.It protects the junction from moisture and atmospheric contaminants. It is used to isolate one device from another.
3. Photoresist Coating: A photoresist is a light-sensitive material used in several processes, such as photolithography .We put the photoresist on a wafer.
There are two types of phtoresist.
Positive Photoresist: Insoluble in original state. Soluble after UV exposure.
Negative Photoresist: Soluble in original state. Insoluble after UV exposure.
4. Masking: The photoresist is exposed to UV rays through the N-well mask. We pass the UV light and expose the photoresist region selectively as per the pattern present in the mask.
5. Etching: Once the desired shape is patterned with photoresist, the etching process allows unwanted materials to be removed.Etching can remove Si,SiO2 and polysilicon.
6. N Well Formation: By using ion implantation or diffusion process N-well is formed.
7. Deposition: It is process of laying down the a thin film of material on the surface of Si wafer.Materials are polysilicon, SiO2,metal.
7. Deposition: It is process of laying down the a thin film of material on the surface of Si wafer.Materials are polysilicon, SiO2,metal.
Deposition is classified into three parts:
1. Chemical Vapor deposition(CVD): This method is used for deposition of polysilicon,metal and dielectric.
2. Physical Vapor deposition(PVD): This method is used for deposition of Aluminium and gold.
3. Epitaxy: It is a very expensive method.The purpose of this method is to grow additional single crystal silicon above the original wafer surface.
3. Epitaxy: It is a very expensive method.The purpose of this method is to grow additional single crystal silicon above the original wafer surface.
8. Ion Implantation: It is the process of adding impurities(Boron,P and As) to a silicon wafer.
9. Annealing: When we add the impurities into wafer then its break covalent bond of the structure.To fix this damage annealing is used.
10. Metallization: Create metal contact.
CMOS Fabrication process explain with diagrams:
9. Annealing: When we add the impurities into wafer then its break covalent bond of the structure.To fix this damage annealing is used.
10. Metallization: Create metal contact.
CMOS Fabrication process explain with diagrams:
Si substrate(P-type)
Oxidation
Photoresist
Masking
Photoresist removal
Etching SiO2
Ion Implantation:Implant Phosphorous(P) n-
type impurity to create N well
N well formation
After removing photoresist and etch SiO2
N well created in p-type substrate
Deposition of polysilicon
N diffusion and P Diffusion
Metallization
Assign the name of terminals of NMOS and PMOS
By using the above steps we can fabricate CMOS using n-well process method.
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