1. Consider the instructions
i) MOV M,B
ii) OUT 40H
iii) LDAX B
Which of the above require write cycle?
a) i,ii,iii
b) i and ii only
c) i and iii only
d) ii and iii only
2. 8085 microprocessor executes below set of instructions. How many times loop will be executed?
MVI A,0FH
NOP
LOOP DCR A
XRA A
JZ LOOP
RET
a) one time
b) 15 times
c) Infinity times
d) None of the above
3. Which of the following number will have same value in both sign magnitude notation and 2's complement notation?
a) 10000000
b) 11000000
c) 11100000
d) 11110000
4. The minimum number of NAND gates required to implement Boolean function A+AB'+AB'C is equal to.
a) 2
b) 4
c) 0
d) None of the above
5. DRAM have advantages over SRAM in that
i) They have lower cost
ii) They require lower number of transistors
iii) They don't need to be refreshed frequently where SRAM need this feature
iv) High packing density guarantees higher storage capacity in single chip.
a) i and ii
b) i only
c) i,ii,iii and iv
d) i, ii and iv
6. The given figure is equivalent of.
a) NMOS NOR gate
b) NMOS NAND gate
c) PMOS NOR gate
d) PMOS NAND gate
7. The 10's complement of (197)11 is (____)11 .
a) 913
b) 923
c) 903
d) None of the above
8. Consider a circuit is shown in below. The number of min term present in standard SOP form.
a) 2
b) 4
c) 3
d) 1
9. A binary number expressed in the 2's complement format is given as 10011101.Its decimal equivalent to.
a) -99
b) 99
c) 80
d) 89
10. In the following figure the output Y2 is given by
a) A⊕B⊕C
b) [A⊕B]C
c) A
d) B
11. The minimum of 2 input NOR gates required to implement Y=(A+B+C+D)' is.
a) 4
b) 5
c) 6
d) 7
12. The logic expression realized by the given MOS circuit is.
a) x'y'+y'z
b) xz'+yz'
c) x'z'+yz'
d) xz+y'z
13.The minimum number of NAND gates required to implement f=∑m(0,1,2,3,11,12,14,15) is.
a) 4
b) 5
c) 3
d) 2
14. For the circuit shown in the figure if present state is 011(QcQbQa).Then after three clock cycles state is
a) 110
b) 000
c) 111
d) 001
15. 4 bit serial in parallel out shift register shown in figure. The register initially contain all 1 s.The content of register QdQcQbQa after four clocks if input data is 0110.
a) 0110
b) 1010
c) 1101
d) 1011
16. How many NOR gate will use to implement for given Boolean function.
F=((A+B).C'+D)(E+F)
a) 7
b) 5
c) 4
d) 9
17. Design a Tri state buffer using 4:1 mux.
18. Design a 3x8 Decoder using 1x2 Decoder.
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